The EU-supported project Dreams has developed architecture and design tools for more powerful computing systems that can boost safety and efficiency in planes, eHealth devices, wind turbines and many more products.
The workshop will be broadly disseminated through HiPEAC and EMSIG, especially addressing all partners of the European Mixed-Criticality Cluster, consisting of the large three European research projects DREAMS, PROXIMA, CONTREX and their associated projects EMC2, CRYSTAL, SAFURE and SAFEPOWER.
Modern embedded applications already integrate a multitude of functionalities with potentially different criticality levels into a single system and this trend is expected to grow in the near future. Further, Europe is facing a once in a lifetime challenge with the advent of multicore and the potential to integrate in a single platform systems with different levels of dependability and security, known as mixed-criticality systems integration. Without appropriate preconditions, the integration of mixed-criticality subsystems based on multi- and many-core processors can lead to a significant and potentially unacceptable increase of engineering and certificatfion costs.
The European Mixed-Criticality Cluster (MCC) was initiated by three EU FP7 projects CONTREX, DREAMS and PROXIMA. After CONTREX and PROXIMA finished late 2016, in the MCC, the DREAMS and the SAFEPOWER projects collaborate and closely work together in terms of identification of future challenges in the design and development of mixed-criticality multicore systems, join dissemination activities, and where possible exploring techniques to attach those challenges.
In addition to the MCC there are several ongoing research initiatives studying mixed-criticality integration in multicore processors including the MultiPARTES, parMERASA and P-SOCRATES project.
Some of the key challenges to be tackled include the combination of software virtualization and hardware segregation and the extension of partitioning mechanisms jointly addressing significant extra-functional requirements (e.g., time, energy and power budgets, adaptivity, reliability, safety, security, volume, weight, etc.) along with development and certification methodology.
- Timing: the foundations for enabling integrated mixed-criticality multicores systems are mechanisms for temporal and spatial partitioning, which establish fault containment and the absence of unintended side effects between functions
- Certification: Certification is key to enable exploitation of results in certain application domains such as railways or energy
- Extra-functional properties: The specific properties that must be satisfied by embedded systems include timeliness, energy efficiency of battery-operated devices, dependable operation in safety-relevant scenarios, short time-to-market and low cost in addition to increasing requirements with respect to functionality.
- Development methods: State-of-the-art model-based design methods still lack of explicit support for modelling mixed-criticality of applications. Support for spatial and temporal segregation properties at the resource allocation or platform view and for the static or dynamic application to computation, memory and communication resource mapping is required.
In a following, a short description of the other projects and links to their project website are given.
SAFEPOWER’s goal is to enable the development of low power mixed-criticality systems through the provision of a reference architecture, platforms and tools to facilitate the development, testing, and validation of these kinds of systems according to the market need. It is expected that the SAFEPOWER reference architecture and platforms will enable the integration and partitioning of mixed-criticality applications on a single device while reducing the total power consumption by 50%, compared to the non-integrated multi-chip implementation. To address this goal, SAFEPOWER needs to address a number of technology development challenges, that will afterwards be applied to the main project outputs, namely the SAFEPOWER low power reference architecture, the platforms and tools for the development, testing, and validation of low power mixed criticality systems.
Contrex [finished Sep. 2016]
To achieve the goals of the project, a consortium with a well-recognized background and specific competence and know-how in the development of predictable computing platforms for embedded systems, including estimation of extra-functional properties in terms of timing, power and temperature, efficient system simulation, exploration and optimization, EDA and related fields has been put together. The consortium has been constructed by taking into account that cooperation is crucial and that all partners must have a strong interest and motivation in carrying out the activities of the project, as well as a clear role that leads to sound and exploitable results.
Proxima [finished Sep. 2016]
Continuing the PROARTIS STREP FP7 Project probabilistic approach to reduce timing verification and validation cost of MCS, PROXIMA pursues the development of probabilistically time analyzable (PTA) techniques and tools for multicore/manycore platforms. PROXIMA will selectively introduce randomization in the timing behavior of certain hardware and software resources as a way to facilitate the use probabilities to predict the overall timing behavior of the software and its likelihood of timing failure. To that end (1) PROXIMA will develop a tool chain including a multicore PTA-compliant processor implemented on FPGA and commercial Operating System and Timing analysis tool; (2) will develop four case studies, one in the main industrial scenarios studied in the project (Avionics, Space, Railway and Automotive) on the PTA-conformant platform; and (3) PROXIMA will also study the applicability of PTA Techniques to analyzing the timing behavior of COTS multicore processors.